Search

Hongce Zhang

A Self-Supervised, Pre-Trained, and Cross-Stage-Aligned Circuit Encoder Provides a Foundation for Various Design Tasks
AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs
NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph
RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Technique
Transferable Pre-Synthesis PPA Estimation for RTL Designs with Data Augmentation Techniques

Published with Hugo Blox Builder — the free, open source website builder that empowers creators.